As we are pretty busy with our customers right now, we decided also to start another round of recruitment / hiring.

We will start having some interviews with recent graduates of Universities with the beginning of next year.

Pierluigi and Matteo are currently busy developing eRM- compliant eVCs for Socionext in Neuried, near to Munich.

I am working on many SOCs Projects involving Systemverilog and UVM for the verification and SystemC with TLM2.0 for the modeling and reference models activities in Infineon Munich.

Still supporting the colleagues on the Projects that used and in the new ones that pops up using Specman and eRM and UVM-e , though, also.

There, Ogheri Consulting GmbH will provide Support for the development of “e” and “eRM” – based verification Environments.

Pierluigi Picciau (pierluigi.picciau@alessandroogheri.com) is another higly skilled verification engineer, with strong knowledge of the “e” language and the eRM Methodology, as of the SystemVerilog language and the UVM Methodology and Class Library.

He is currently engaged in a Team in which he is responsible for the verification of portions of a chip used in Flash memories Controllers.

recently we applied also for the Synopsys VMM Catalyst partnership successfully.

This is an important result for us, since we as UVCs (universal verification components) providers and trainings providers are in need of supporting all the major enterprise graded simulators present on the Market.

We applied successfully for the Cadence Verification Alliance partnership Program and the Mentor Questa Vanguard Program recently, so now we are officially partners.

We plan to grow our business still a bit during this year, and we will keep you updated.

He will start in May 2011 with a big semiconductors customer in Munich, working on firmware development for one of their devices.

The colleague Matteo De Luigi (matteo.deluigi@alessandroogheri.com) is now together with me at the customer site (Infineon Munich) and works at an e- language – based verification environment for the check of the firmware running on a microchip used as a Flash memories controller.

This is a big achievement for us, and one of which we are particularly proud (please consider that we were a one-man-show company just until some months ago!), and we see it only as our first step: we plan to grow also in the near future!

I (mis-)use the BLOG to let you know that I will be busy from February, 2009 until end of April  for consulting activities.

Alex

as usual, I misuse somehow the blog feature of my hosting plan to communicate some news to you!

I would like to inform you that we are growing:

starting from July 2008 two new colleagues joined the group (calling it a “company” seems to me a little too much, at this point!):

Michele Checchinato, which is finishing his diploma thesis with us and

Matteo De Luigi, that joined immediately after graduation.

The two guys are working on a specman-based verification environment for the ALU unit of a publicly available CPU core, the pretty well known LEON3 of Gaisler Research.

The design is coded in VHDL, and the specman environment will be made in observation to the rules and architectural guidelines of the e reuse methodology (eRM) of Cadence.

We expect in particular Matteo to be available for consulting jobs at customer sites after this activity has finished (it will be around October or November 2008), so…

if you need a specman- knowledged and VHDL-knowledged consultant, dont hesitate to contact us!

Kind Regards,

Alex